Fixed NOR extended cache zero base handling

Co-authored-by: Codex <codex@openai.com>
This commit is contained in:
Frédéric Desbiens
2026-06-30 10:04:02 -04:00
co-authored by Codex
parent 3729d2f2c2
commit 6122a080be
6 changed files with 377 additions and 64 deletions
+3 -1
View File
@@ -10,6 +10,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Codex (GPT-5).
/**************************************************************************/
/**************************************************************************/
@@ -537,6 +539,7 @@ typedef struct LX_NOR_FLASH_EXTENDED_CACHE_ENTRY_STRUCT
ULONG *lx_nor_flash_extended_cache_entry_sector_address;
ULONG *lx_nor_flash_extended_cache_entry_sector_memory;
ULONG lx_nor_flash_extended_cache_entry_access_count;
UINT lx_nor_flash_extended_cache_entry_valid;
} LX_NOR_FLASH_EXTENDED_CACHE_ENTRY;
@@ -814,4 +817,3 @@ VOID _lx_nor_flash_system_error(LX_NOR_FLASH *nor_flash, UINT error_code);
#endif
#endif
+24 -14
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@@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Codex (GPT-5).
/**************************************************************************/
/**************************************************************************/
@@ -76,15 +78,19 @@ UINT status;
#ifndef LX_NOR_DISABLE_EXTENDED_CACHE
UINT i;
ULONG *block_start_address;
ULONG *block_end_address;
ULONG block_start_address;
ULONG block_end_address;
ULONG *cache_entry_start;
ULONG *cache_entry_end;
ULONG cache_entry_start_value;
ULONG cache_entry_end_value;
/* Calculate the block starting address. */
block_start_address = nor_flash -> lx_nor_flash_base_address + (block * nor_flash -> lx_nor_flash_words_per_block);
block_end_address = block_start_address + nor_flash -> lx_nor_flash_words_per_block;
/* Calculate the block starting address.
MISRA C:2012 Rule 11.4 deviation: NOR driver addresses may be logical
address tokens, including zero, so compare address values without
dereferencing them. */
block_start_address = (ULONG)(nor_flash -> lx_nor_flash_base_address) + (block * nor_flash -> lx_nor_flash_words_per_block * sizeof(ULONG));
block_end_address = block_start_address + (nor_flash -> lx_nor_flash_words_per_block * sizeof(ULONG));
/* Loop through the cache entries to see if there is a sector in cache. */
for (i = 0; i < nor_flash -> lx_nor_flash_extended_cache_entries; i++)
@@ -94,15 +100,21 @@ ULONG *cache_entry_end;
/* Determine the cache entry addresses. */
cache_entry_start = nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_sector_address;
cache_entry_end = cache_entry_start + LX_NOR_SECTOR_SIZE;
/* Determine if the flash address in in the cache entry. */
if ((cache_entry_start) && (block_start_address <= cache_entry_start) && (block_end_address > cache_entry_end))
/* Determine if the cache entry is in the block being erased. */
if (nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_valid)
{
cache_entry_start_value = (ULONG)cache_entry_start;
cache_entry_end_value = cache_entry_start_value + (LX_NOR_SECTOR_SIZE * sizeof(ULONG));
/* Yes, this cache entry is in the block to be erased so invalidate it. */
nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_sector_address = LX_NULL;
nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_access_count = 0;
if ((block_start_address <= cache_entry_start_value) && (block_end_address > cache_entry_end_value))
{
/* Yes, this cache entry is in the block to be erased so invalidate it. */
nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_sector_address = LX_NULL;
nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_access_count = 0;
nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_valid = LX_FALSE;
}
}
}
#endif
@@ -117,5 +129,3 @@ ULONG *cache_entry_end;
/* Return completion status. */
return(status);
}
+49 -37
View File
@@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Codex (GPT-5).
/**************************************************************************/
/**************************************************************************/
@@ -76,8 +78,11 @@ UINT _lx_nor_flash_driver_read(LX_NOR_FLASH *nor_flash, ULONG *flash_address, U
UINT status;
UINT i;
ULONG *cache_entry_start;
ULONG *cache_entry_end;
ULONG cache_entry_start_value;
ULONG cache_entry_end_value;
ULONG cache_offset;
ULONG flash_address_value;
ULONG base_address_value;
UINT least_used_cache_entry;
@@ -91,6 +96,11 @@ UINT least_used_cache_entry;
/* Initialize the least used cache entry. */
least_used_cache_entry = 0;
/* MISRA C:2012 Rule 11.4 deviation: NOR driver addresses may be logical
address tokens, including zero, so compare address values without
dereferencing them. */
flash_address_value = (ULONG)flash_address;
do
{
@@ -102,52 +112,55 @@ UINT least_used_cache_entry;
/* Determine the cache entry addresses. */
cache_entry_start = nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_sector_address;
cache_entry_end = cache_entry_start + LX_NOR_SECTOR_SIZE;
/* Determine if the flash address in in the cache entry. */
if ((cache_entry_start) && (flash_address >= cache_entry_start) && (flash_address < cache_entry_end))
/* Determine if the flash address is in the cache entry. */
if (nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_valid)
{
cache_entry_start_value = (ULONG)cache_entry_start;
cache_entry_end_value = cache_entry_start_value + (LX_NOR_SECTOR_SIZE * sizeof(ULONG));
/* Yes, we found the entry. */
/* Increment the accessed count. */
nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_access_count++;
/* Calculate the offset into the cache entry. */
cache_offset = (ULONG)(flash_address - cache_entry_start);
/* Copy the word from the cache. */
*destination = *(nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_sector_memory + cache_offset);
/* Increment the number of cache hits. */
nor_flash -> lx_nor_flash_extended_cache_hits++;
/* Return success. */
return(LX_SUCCESS);
}
else
{
/* Determine if we have a new least used sector. */
if (i != least_used_cache_entry)
if ((flash_address_value >= cache_entry_start_value) && (flash_address_value < cache_entry_end_value))
{
/* Determine if this entry has a smaller accessed count. */
if (nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_access_count <
nor_flash -> lx_nor_flash_extended_cache[least_used_cache_entry].lx_nor_flash_extended_cache_entry_access_count)
{
/* Yes, we found the entry. */
/* New least used entry. */
least_used_cache_entry = i;
}
/* Increment the accessed count. */
nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_access_count++;
/* Calculate the offset into the cache entry. */
cache_offset = (flash_address_value - cache_entry_start_value) / sizeof(ULONG);
/* Copy the word from the cache. */
*destination = *(nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_sector_memory + cache_offset);
/* Increment the number of cache hits. */
nor_flash -> lx_nor_flash_extended_cache_hits++;
/* Return success. */
return(LX_SUCCESS);
}
}
/* Determine if we have a new least used sector. */
if (i != least_used_cache_entry)
{
/* Determine if this entry has a smaller accessed count. */
if (nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_access_count <
nor_flash -> lx_nor_flash_extended_cache[least_used_cache_entry].lx_nor_flash_extended_cache_entry_access_count)
{
/* New least used entry. */
least_used_cache_entry = i;
}
}
}
/* Now read in the sector into the cache. */
cache_offset = (ULONG)(flash_address - nor_flash -> lx_nor_flash_base_address);
base_address_value = (ULONG)(nor_flash -> lx_nor_flash_base_address);
cache_offset = (flash_address_value - base_address_value) / sizeof(ULONG);
cache_offset = cache_offset & ~((ULONG) (LX_NOR_SECTOR_SIZE-1));
cache_entry_start = nor_flash -> lx_nor_flash_base_address + cache_offset;
cache_entry_start = (ULONG *)(base_address_value + (cache_offset * sizeof(ULONG)));
/* Call the actual driver read function. */
#ifdef LX_NOR_ENABLE_CONTROL_BLOCK_FOR_DRIVER_INTERFACE
@@ -171,6 +184,7 @@ UINT least_used_cache_entry;
/* Setup the cache entry. */
nor_flash -> lx_nor_flash_extended_cache[least_used_cache_entry].lx_nor_flash_extended_cache_entry_sector_address = cache_entry_start;
nor_flash -> lx_nor_flash_extended_cache[least_used_cache_entry].lx_nor_flash_extended_cache_entry_access_count = 0;
nor_flash -> lx_nor_flash_extended_cache[least_used_cache_entry].lx_nor_flash_extended_cache_entry_valid = LX_TRUE;
/* Increment the number of cache misses. */
nor_flash -> lx_nor_flash_extended_cache_misses++;
@@ -211,5 +225,3 @@ UINT status;
return(status);
#endif
}
+25 -12
View File
@@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Codex (GPT-5).
/**************************************************************************/
/**************************************************************************/
@@ -77,8 +79,10 @@ UINT _lx_nor_flash_driver_write(LX_NOR_FLASH *nor_flash, ULONG *flash_address,
UINT status;
UINT i;
ULONG *cache_entry_start;
ULONG *cache_entry_end;
ULONG cache_entry_start_value;
ULONG cache_entry_end_value;
ULONG cache_offset;
ULONG flash_address_value;
/* Is the request a whole sector or a partial sector. */
@@ -87,6 +91,11 @@ ULONG cache_offset;
/* One word request, which implies that it is a NOR flash metadata write. */
/* MISRA C:2012 Rule 11.4 deviation: NOR driver addresses may be logical
address tokens, including zero, so compare address values without
dereferencing them. */
flash_address_value = (ULONG)flash_address;
/* Loop through the cache entries to see if there is a sector in cache. */
for (i = 0; i < nor_flash -> lx_nor_flash_extended_cache_entries; i++)
{
@@ -95,22 +104,27 @@ ULONG cache_offset;
/* Determine the cache entry addresses. */
cache_entry_start = nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_sector_address;
cache_entry_end = cache_entry_start + LX_NOR_SECTOR_SIZE;
/* Determine if the flash address in in the cache entry. */
if ((cache_entry_start) && (flash_address >= cache_entry_start) && (flash_address < cache_entry_end))
/* Determine if the flash address is in the cache entry. */
if (nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_valid)
{
cache_entry_start_value = (ULONG)cache_entry_start;
cache_entry_end_value = cache_entry_start_value + (LX_NOR_SECTOR_SIZE * sizeof(ULONG));
/* Yes, we found the entry. */
if ((flash_address_value >= cache_entry_start_value) && (flash_address_value < cache_entry_end_value))
{
/* Calculate the offset into the cache entry. */
cache_offset = (ULONG)(flash_address - cache_entry_start);
/* Yes, we found the entry. */
/* Copy the word into the cache. */
*(nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_sector_memory + cache_offset) = *source;
/* Calculate the offset into the cache entry. */
cache_offset = (flash_address_value - cache_entry_start_value) / sizeof(ULONG);
/* Get out of the loop. */
break;
/* Copy the word into the cache. */
*(nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_sector_memory + cache_offset) = *source;
/* Get out of the loop. */
break;
}
}
}
}
@@ -140,4 +154,3 @@ UINT status;
return(status);
#endif
}
@@ -278,6 +278,7 @@ ULONG block_word;
nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_sector_address = LX_NULL;
nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_sector_memory = cache_memory;
nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_access_count = 0;
nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_valid = LX_FALSE;
/* Move the cache memory forward. */
cache_memory = cache_memory + LX_NOR_SECTOR_SIZE;